It is very easy for one to know how to use a Cisco router without knowing the various stages involved during its boot process. As a network engineer, it is required of you to understand these stages, not just for certification exam purposes but to help in your career as a network engineer. In this post, I will share with us the various stages of the router’s boot process and the events that happen at each stage.
Points to note about the router:
>> Routers are layer 3 devices
>> Routers break up broadcast by default
Routers perform the following functions on a network:
>> Path selection
>> Packet switching
>> Packet filtering
The router’s boot process
When a router is power up, it goes through the following boot process:
>> Power On Self Test (POST):
This involves checking the various hardware components of the router to determine if they are all in good working condition. If the POST process fails, the boot sequence ends there, but if all components are found to be okay, then it proceeds to the next stage.
>> Load a valid ios from flash:
After passing the POST, the router looks for a valid internetworking operating system (ios) stored in flash memory and loads it. The router has specific instructions that tell it to check the flash memory for the ios file. The instructions can be altered to make the router boot from a TFTP server or a USB, depending on the model of router. After loading a valid ios from the flash memory, the router looks for a valid configuration file.
>> Valid configuration in NVRAM:
This stage is where the router looks for a valid configuration file stored in non-volatile random access memory (NVRAM). The file is called the start-up configuration. When it is found and loaded into RAM, that copy held in RAM becomes the running configuration.
In conclusion, there are three stages involved in a router’s boot process: Post, loading ios from flash, and loading a running configuration from NVRAM. The router has specific instructions stored in the configuration register that direct the boot process on what memory to contact at every stage of the boot operation.